The Mont-Blanc European Exascale supercomputing project based on ARM power-efficient technology, using Cavium ThunderX2 ARM server processor to power its new High Performance Computing (HPC) prototype with HPC SW infrastructure for ARM with tools, code stacks and libraries and more. The ambition of the Mont-Blanc project is to define the architecture of an Exascale-class compute node based on the ARM architecture, and capable of being manufactured at industrial scale. The Mont-Blanc 3 system being built by a consortium which includes Atos, ARM, AVL (Austrian power train developer) and seven academic institutions, including the Barcelona Supercomputer Center (BSC), implements this ARM for HPC with high memory bandwidth and high core count on Cavium’s custom ARMv8 core architecture with out-of-order execution that can run at 3 GHz. The ThunderX2 might be delivering twice the integer and floating point performance compared with ThunderX1 with also twice the memory bandwidth.
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