This talk dives into “mutator dynamics” in spatial, asexual populations: when do high-mutation-rate lineages win, fix, or get reversed by lower-mutation competitors as population size changes. It uses agent-based digital evolution on a 2D lattice to capture selection, drift, and clonal interference, then connects the patterns to hypermutator observations in oncology, antibiotic resistance, and other fast-evolving settings. https://midas.umich.edu/directory/matthew-andres-moreno/
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The compute core is mapping that biology onto the Cerebras Wafer-Scale Engine (WSE-2): ~850,000 small cores, ~40 GB on-wafer SRAM (about 48 KB per core), a 2D mesh where communication is local to neighbors, and constrained host I/O. The simulation is reshaped to match the hardware: locality-preserving updates, neighbor message passing, and tight memory layouts that sidestep global sync.
To make observability fit the device, the run records the wafer-wide state as a single bit per site (high vs low mutation rate), turning frames into a compact distributed bitfield. A generalized ring-buffer scheme then packs time-series samples into fixed memory while staying flexible about run length, with sampling that can be even across history or biased toward recent dynamics depending on the analysis need.
The visual time series highlights two outcomes: one replicate where high-mutation “dark” types take over and stay fixed, and another where low-mutation pockets survive and later recolonize the grid. Performance numbers in the presentation compare CPU, an NVIDIA A100 GPU, and the wafer-scale run, reporting ~100,000× speedup vs CPU and ~294× vs A100 for this workload, which makes larger population sweeps far more reachable. This interview was recorded at Supercomputing SC25 in St. Louis, Missouri.
The broader takeaway is a recipe for running non-deep-learning HPC on AI/ML accelerators: treat sampling as a first-class design constraint, keep data movement local, and use bit-level compression to stretch on-chip SRAM. The talk also points to PSC’s Neocortex program, which provides supported research access to wafer-scale hardware through NSF ACCESS, helping more scientists experiment with these architectures in open science today.
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