Octavo Systems focuses on System-in-Package design: taking a microprocessor, DDR memory, power management and key passives, then collapsing them into a molded BGA that removes much of the hardest board-level integration. In this interview, that idea is shown not as an abstract packaging story but as a practical way to reduce layout risk, shrink PCB area, and accelerate bring-up for embedded Linux, edge AI, industrial control and audio products. https://octavosystems.com/
The most memorable demo is a Chaos Audio multi-effects guitar pedal, where the SiP handles the real-time audio DSP while a phone or tablet acts mainly as the control surface over Bluetooth. The point is not just miniaturization; it is deterministic local processing with effectively no audible latency, which is exactly what musicians need when switching tones, stacking effects, or building a digital pedalboard that still feels immediate under the fingers.
From there the discussion moves to Octavo’s newer processor-module direction, including the TI AM62-based OSD62PM and the STM32MP2-based OSD32MP2-PM reference platform. The pitch is very specific: processor plus DDR4 in a package roughly the size of the DRAM footprint, with major savings in area and routing complexity compared with a discrete MPU-and-memory design. Camera interfaces, DSI, LVDS, PCIe, Ethernet and built-in AI capability make these parts relevant for HMI, vision, smart gateways, robotics and compact edge compute gear.
What makes the booth tour useful is the range of deployed examples. Octavo shows SiP designs inside ROS 2 robotics modules, a retail people counter, a programmable smart torque drill for manufacturing, a compact SOM, an AMD Zynq UltraScale+ MPSoC platform for ADAS-style video inference, and an industrial automation controller with RS485, CAN and cloud connectivity. That broad spread makes the technology easier to understand: SiP is not a single market play, but a packaging and productization strategy that fits many embedded workloads.
A recurring theme is that SiP is not only about size. Octavo argues that pre-validating the processor-to-memory subsystem removes non-differentiating engineering work, reduces design spins, and in some cases can even compete on BOM cost when compared with sourcing the processor and DRAM separately. Filmed at Embedded World 2026 in Nuremberg, this is a grounded look at how integration, thermals, Linux-class processing and edge AI are being pushed into much smaller hardware footprints without turning every product into a custom high-risk board design.
All my Embedded World videos are in this playlist: https://www.youtube.com/playlist?list=PL7xXqJFxvYvjgUpdNMBkGzEWU6YVxR8Ga
