ThunderX2 is Cavium's Second generation ARM Server Processor product family providing one of the fastest 64bit ARMv8 Data Center & Cloud Processor, featuring high integration and high SoC performance on 14 Finfet process. With high performance custom fully out-of-order (OOO) cores, single and dual socket configurations, very high memory bandwidth, large memory capacity, integrated hardware accelerators, fully virtualized core and IO, scalable Ethernet fabric and feature rich I/O’s supporting 25Gbps. The ThunderX2 family includes multiple Workload Optimized SKUs that enable servers & appliances that are optimized for compute, storage, network and secure compute workloads in the cloud. The ThunderX2 processor family is fully compliant with ARMv8 architecture specifications as well as ARM’s SBSA. ThunderX2 scales up to 54 cores with up to 3.0 GHz core frequency, fully cache coherent across dual sockets using Cavium Coherent Processor Interconnect (CCPI™) offering the largest integrated I/O capacity with 100s of Gigabits of I/O bandwidth using integrated 25Gbps SerDes, Six DDR4 72 bit memory controllers capable of supporting 3200 MHz memories with 1+TB of memory in a dual socket configuration, Hundreds of integrated hardware accelerators for security, storage, networking and virtualization applications, Fabric for interconnectivity of nodes supporting SLA enforcements with awareness and policy enforcement for virtual networks, Virtualization everywhere with Cavium virtSOC technology – Full system level low latency virtualization solution from core to I/O. Support for PCIe Gen3 x16 along with integrated 10/25/40/50/100GbE and SATAv3 ports and more.
Ambedded provides an ARM Micro Server solution for Software Defined Storage, distributed Cloud Storage/Computing integrated to lower the cost of energy, hardware and management for datacenter and enterprise. Ambedded's architecture uses one Marvell Armada 385 Dual-core ARM Cortex-A9 based micro server, 2GB RAM, 2.5Gbit Ethernet, 6Gbit/s SATA, 8GB Flash for each hard drive which enables unlimited scalability to scale out compute power, network bandwidth and storage capacity. Ambedded's software defined storage solution is supported by Ceph and GlusterFS to offer unified scale out storage solution for object storage, block storage and file sharing system. Ambedded's ARM microserver product can also potentially to be used for various distributed applications such as web service, content delivery, NoSQL and big data analysis. Filmed in 4K using Sony AX53
George Grey, Linaro CEO, gives the opening keynote of Linaro Connect Bangkok. He discusses Linaro’s activities across the ARM ecosystem from sensor devices to the data-center. New initiatives including end-to-end open source software platform solutions, ARM Based Developer Cloud, $299 Lemaker Cello using AMD 64bit Server SoC following the 96Boards Enterprise Edition specs are announced and demonstrated.
Eric Hennenhoefer, ARM VP Research talks about ARM Reasearch in the High Performance Computing area and more.
OPNFV Pharos Lab project deals with developing an OPNFV lab infrastructure that is geographically and technically diverse. The Pharos Lab is hosted in Kista, Sweden, it will greatly assist in developing a highly robust and stable OPNFV platform (see more: https://wiki.opnfv.org/pharos) OPNFV is a carrier-grade, integrated, open source platform to accelerate the introduction of new NFV products and services (see more: https://wiki.opnfv.org/start)
The following ARMv8 servers are used:
- Controller nodes: 3 * Applied Micro X-Gene 2 ARMv8-64 8 cores @ 2.4GHz, 32GB RAM, 1x128GB SSD, 2x1TB HDD, 1x10Gbps SFP+ NICs, 2x1Gbps NICs.
- Compute nodes: 2-3* Cavium Networks CN8890-CRB ThunderX ARMv8-64 48 cores @ 2.5GHz, 8x16GB RAM (128GB total), 1x500GB HDD, 1x40Gbps QSFP+ NIC, 2x10Gbps SFP+ NICs, 1x1Gpbs NIC (RJ45, IPMI interface).
ENEA’s demo in ARM booth was showing a simple NFV application running on our operational ARMv8 Pharos lab infrastructure. The application demonstrates a simple NFV service chain integrating a DPI (deep packet inspection) VNF engine provided by QOSMOS (see more: http://www.qosmos.com).
Cavium ThunderX 64bit 48-core ARM Server enabling the 5G mobile future, next gen cloud/datacenter and NFV
Cavium’s ThunderX 48-core ARMv8 64bit SoC is being implemented in dozens of ARM Server designs, by partners as Pegatron, Asus, Mitac, Gigabyte, Wiwynn, Acer and even for for super computing by E4 and Cray. Cavium and their software partners have optimized their ARM Server platform for variety of workloads, including NFV (Network Function Virtualization), Cloud RAN (Radio Access Network) for Virtualizing the access network, moving all the physical base stations to the cloud, which will save the industry a lot of money, hyperscale datacenter, web hosting like RunAbove (a subsidiary of OVH) at https://www.runabove.com/armcloud.xml, Ceph storage clusters. This can only be done using ARM and Cavium ThunderX SoC processors, providing a much better TCO (Total Cost of Ownership) and efficient alternative to Intel x86. Cavium and partners, as Linaro and the open source community also are showing progress in the OPNFV, OpenStack, ODP (Open Data Plane), DPDK, fd.io, etc. for the networking and telecom industry.
Demonstrate ODP IPSec ESP protocol offload advantages over standard algorithm-oriented crypto API. Core utilization is measured for a given traffic load using standard odp_ipsec application and an ESP offload enhanced version of the same application (odp_ipsec_proto_ Benefits of significant core utilization decrease and simpler application code are demonstrated.
Functional demonstration of ODP-OpenvSwitch (ODP-OVS) running on ThunderX. ODP-OVS to process the upd pkt in loopback way on 10G port. Pkt generator pumps 10G traffic to ODP-OVS port. ODP-OVS receives pkts, validates pkt hash from ovs flow_table and then loopback to same port at 10G line rate.
Running virtualization on the 16 or 32-core ARM Cortex-A57 Hisilicon D02 board.
Developed new ODP features to achieve high performance, optimize the memory management, uio dev management framework, support crypto accelerator dev, pmd driver.
Working on the Boot Architecture (ACPI, UEFI), members from AMD, Qualcomm, Cavium, Alibaba, all engineers working together to make all the software boot for ARM Servers, leading projects around Open Stack, Big Data, going up the stack, finding things to optimize, such as virtualization, to have Server parity on ARM vs x86.