Broadcom’s Thor Ultra is a new 800G AI Ethernet NIC designed to push scale-out bandwidth per GPU to 800 Gbit/s using a single OSFP port on a PCIe Gen6 x16 adapter. In this interview, product manager Sundeep Balani explains how the card targets GPU and XPU back-end networks where collective operations dominate, and why moving from 400G to 800G per accelerator matters for cost-per-token and training throughput in large AI clusters More on the adapter family here: https://www.broadcom.com/products/ethernet-connectivity/network-adapters/p1800go
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Thor Ultra is presented as an Ultra Ethernet Consortium (UEC)–compliant NIC that modernizes RDMA/RoCE for AI fabrics, adding packet-level multipathing, out-of-order data placement directly into GPU memory, selective retransmission and a fully programmable congestion-control pipeline. These hardware capabilities are intended to keep link utilization high even when packets take different paths across a very large fabric, addressing the traditional scaling limits of RoCE-based Ethernet in multi-rack GPU topologies.
On the hardware side, the video walks through the OCP NIC form factor with a single OSFP112 port, large heatsinks over both the optical cage and the Thor Ultra ASIC, and an air-cooled design that can later evolve toward liquid-cooled variants for denser racks. Filmed on the show floor at Supercomputing 2025 #SC25 in St Louis, the demo focuses on how this 800G NIC is meant to sit directly beside each GPU in high-density servers, rather than being a shared resource for the whole node. That per-GPU NIC topology is what enables many simultaneous collective flows without starving individual accelerators of bandwidth.
Broadcom positions Thor Ultra as backward compatible at the platform level—same OCP and PCIe CEM form factors as existing adapters—while introducing a clean-sheet architecture aimed purely at AI scale-out. The NIC integrates with UEC-compliant switches such as Broadcom’s Tomahawk 5 and 6 families and uses 100G/200G PAM4 SerDes, line-rate encryption/decryption, secure boot and device attestation to meet both performance and security requirements in modern data centers The form-factor continuity should allow GPU server vendors to drop Thor Ultra into existing designs as PCIe Gen6 platforms become mainstream.
Throughout the conversation, there is an emphasis on cluster-level impact rather than headline link speed: the ability to scale beyond 100,000 XPUs on Ethernet, reduce fabric-induced job retries, and standardize on an open UEC spec instead of proprietary interconnects ([SDxCentral][5]) Viewers get a concise tour of how this NIC, its OSFP interface and its telemetry and congestion-control hooks fit into the broader AI training fabric, making clear why 800G Ethernet adapters are becoming central components of next-generation AI networking.
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