Self-balancing on a ball by inverted pendulum, they dance synchronized, using sensors, cameras and perfect precision in the remote coordination, they demonstrate some of Murata’s sensor components and innovation ability. You can watch the rest of the video to see some of Murata’s sensors, energy harvesting demonstrations and more.
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Cavium demonstrates a high performance implementation of ODP-IPSec packet processing on a Cavium MIPS SoC on both Linux-Userspace and Bare Metal runtime environments. The demo is able to produce 40GB/s IPSec ESP processing.
Demonstrate the performance effective implementation of ODP-IPSec packet processing on Cavium SoC on Linux-Userspace and Bare Metal runtime environments.
IPSec ESP Processing (Authentication and Cipher)
40G Line rate
Linux User Mode environment support
Bare metal environment support
AES-CBC Cypher ( RFC 3602)
HMAC-SHA1-96 Authentication (RFC 2404)
Multiple SA support
LiveU presents their new LU200 at a lower price point and more compact, easier to use for every broadcaster camera, integrates with LiveU’s cloud-based platform, the idea is to be small and portable enough to enable every field camera to be equipped with a bonding uplink unit for live broadcasting from anywhere. It weighs just over 500 grams, the LU200 is available in a pouch or camera-mount configuration, LiveU LU200 supports two 4G LTE/3G modems together with Wi-Fi and LAN connections and includes LiveU’s proprietary antenna modules for extra resiliency. The flexible LU200 can also serve as a stand-alone video encoder with satellite integration functionality, or be used as a LiveU DataBridge mobile hotspot for all IP applications in the field. LiveU makes live video broadcasting possible anywhere, in any situation, even when there is a lot of interference it can still get a live streaming video upload signal through from the camera by bonding all of these networks together in one box.
Dr Christos Kolias of Orange and Raj Murali of Linaro talk Network Functions Virtualization (NFV), SDN, ODP
Interview with Orange Sr. Research Scientist Dr. Christos Kolias and Raj Murali, Director of the Linaro Network Group on LNG Networking & Demo Day at the Connect event. The interview focuses on discussion about network functions virtualization (NFV), software defined networking (SDN), and OpenDataPlane (ODP).
Dr. Kolias explains the motivations and goals of the NFV project while Mr. Murali discussed the state of the ODP project and how it relates to the wider goals of NFV and SDN. The OpenDataPlane project provides an efficient abstraction layer to permit data plane applications to run portably across a wide variety of networking SoC platforms and processor architectures while still exploiting the various acceleration and offload features of those platforms. Mr. Murali also discussed the OpenDataPlane demonstrations showcased at Linaro Connect 2014. ODP v1.0 is scheduled for delivery at the end of 2014.
Network Functions Virtualization (NFV) envisions and promises to change the service provider landscape and has emerged as one of one of today’s significant trends. Although less than two years old, NFV has garnered the industry’s full attention and support. Moving swiftly, a number of key accomplishments have already taken place, and a lot more work is currently under way within ETSI NFV while we are embarking on its future phase. Various proofs-of-concepts (ranging from vEPC to vCPE, vIMS and vCDN) are being developed while issues such as open source and SDN are becoming key ingredients as the can play a pivotal role.
OpenDataPlane is a framework for developing cross-platform user space dataplane applications, like it is the case with Open vSwitch. For this we have written a “netdev provider” based on ODP to make OVS capable to work on a variety of platforms through the abstractions provided by the ODP API. The OpenDaylight Controller’s role is to manage virtual OVS switches/bridges running on top of ODP, both through a GUI web interface as well as through a series of scripts that take advantage of the REST northbound API of the OpenDaylight Controller. The video also shows how to control OVS switches through the ovs-ofctl command line tool of OVS, that is equivalent to using an externally connected controller implementing the OpenFlow specification (like the OpenDaylight Controller).
Right now the ODP netdev layer for OVS runs on linux-generic using basic socket transport, and it is scheduled to be running on linux-dpdk and linux-keystone2 ODP platforms. For the purpose of the demo the ODP netdev layer doesn’t take advantage of ODP’s packet scheduler, it only sends and receives packets in burst mode. For that it might be necessary to implement a dpif provider, which is one layer upper in the design of Open vSwitch.
Cavium launches the world’s fastest ARM Processor in their family of workload optimized ThunderX 64bit ARMv8 Server Processors (including ThunderX_CP for Cloud, ThunderX_ST for Storage, ThunderX_SC for Security and ThunderX_NT for Networking), for a range of applications in the cloud and data center. With 48 cores running at 2.5GHz each, ThunderX is the world’s highest performing low-power 64-bit ARMv8 SoC family of workload optimized processors with a range of SKUs and form factors for high performance volume compute, storage, secure compute and networking specific workloads. Analysts predict that the global data center infrastructure market, including servers, storage, networking, security and virtualization, will reach $128 billion in 2014. Cavium is hereby taking their share of that market by releasing their extremely high performance custom design ARM Server processor.
This product family is based on highly efficient full custom processor cores designed by Cavium in 28nm process technology under architectural license from ARM. It is fully compliant with ARMv8 architecture as well as ARM’s Server Base System Architecture (SBSA) standard while bringing to market dramatic enhancements that include:
-The first ARM based SoC that scales up to 48 cores with up to 2.5 GHz core frequency with 78K of I-Cache and 32K of D-Cache along with 16MB of L2 cache.
– The first ARM based SOC to be fully cache coherent across dual sockets using Cavium Coherent Processor Interconnect (CCPI™)
– Integrated I/O capacity with 100s of Gigabits of I/O bandwidth
– Four DDR3/4 72 bit memory controllers capable of supporting 2400 MHz memories with 1TB of memory in a dual socket configuration
– Hundreds of integrated hardware accelerators for security, storage, networking and virtualization applications.
– Standard based low latency Ethernet fabric interconnecting thousands of ThunderX™ nodes in 2D and 3D configurations and enabling fabric monitoring and SLA enforcements with awareness and policy enforcement for virtualized networks.
– Virtualization everywhere with Cavium virtSOC™ technology – Full system virtualization for low latency from virtual machine to I/O.
– Best in class performance per watt and performance per dollar for the target applications
Read more: press release
- Cavium announces 48-core ARMv8 server processor (techreport.com)
- Cavium packs 48 cores into ThunderX ARM chips (pcworld.com)
- Cavium Thunder X ups the ARM core count to 48 on a single chip (semiaccurate.com)
- Welcoming Cavium as latest Xen Project Advisory Board member (xen.org)
- Cavium ThunderX: 2.5 GHz, 48 Core ARMv8 SoC (phoronix.com)
- Cavium ThunderX ARM Chip Rumbles Into Hyperscale (enterprisetech.com)
- 48 Core ARM-64 processors from Cavium to challenge Xeons? (eetimes.com)
- 64-bit Cortex Platform To Take On x86 Servers In The Cloud (electronicdesign.com)
- Cavium sets sights on Intel with 48-core SoC (go.theregister.com)
- Cavium Announces Mainstream ARM Server Chips To Challenge Xeon (techweekeurope.co.uk)
Bob Monkman, Networking Segment Marketing Manager for ARM, shares his view on some of the essential value propositions of the ARM ecosystem that are driving the adoption of the ARM architecture in networking infrastructure. In addition, Bob speaks about trends such as Software-defined networking (SDN) and Network Functions Virtualization (NFV) that driving significant change in the sector and how the Linaro Networking Group is contributing important work, including the proposed standard data plane programming API project, OpenDataPlane, in the space.
The Linaro Networking Group marked its first anniversary at the Linaro Connect Asia. Here Bob Monkman, ARM Enterprise Segment Marketing Manager, interviews Pradeep Kathail, Cisco Chief Software Architect, Network Operating System Group, to reflect on the year’s accomplishments and current activity within LNG. In addition to delivering Big Endian support in the Linux kernel, LNG launched the OpenDataPlane (ODP) project to enable data plane applications to easily port across different hardware platforms and architectures while retaining the ability to exploit hardware acceleration features unique to each platform. Pradeep discusses the importance of ODP and its relationship to other open source initiatives like OpenDaylight (ODL) as part of the larger industry trends of Software Defined Networks (SDN) and Network Functions Virtualization (NFV).
and here’s my Interview with him:
and here is his keynote video from the LinaroOnAir channel:
Here’s the 16-core ARM Cortex-A15 processor from HiSilicon Huawei on a development board for ARM Powered Networking and Servers coming up. Hacked on in this video by Linaro Toolchain Engineer Rob Savoye (2), who now is climbing the Mount Everest. Linux kernel v3.13 is running on this board, with three SATA ports and two Gigabit ethernet ports driver ready. The BSP code will soon be upgraded to kernel v3.14 and be upstreamed in parallel. Source code and binaries are released through Linaro website. Ubuntu Server is verified on this board. In this demo, it runs a GCC toolchain native build. Linaro Toolchain Working Group plans to use this board to run multiple builds per board, to maximally saturate D01’s computing and storage capability.
Kernel source: http://git.linaro.org/landing-teams/working/hisilicon/kernel.git (branch: integration-hilt-d01)
Binary release: http://www.linaro.org/downloads/ (found ‘HiSilicon D01′)
WiKi page: https://wiki.linaro.org/Boards/D01
The BSC9132 is a highly integrated device that targets evolving microcell, picocell, and enterprise-femto base station applications. The BSC9132 device combines two e500 cores, built on Power Architecture technology, and two StarCore SC3850 cores with MAPLE-B2P baseband acceleration processing elements to address the need for a high-performance, low-cost, integrated solution that handles all required processing layers without the need for an external device except for an RF transceiver or, in a micro base station configuration, a host device that handles the L3/L4 and handover between sectors.
With primary target air interfaces for LTE-FDD/TDD and WCDMA (HSPA+), the BSC9132 programmable device supports the performance and cost requirements of up to 20 MHz single sector LTE-FDD/TDD by handling 150 Mbps downlink and 75 Mbps uplink rates, 5 MHz HSPA+ by handling 42 Mbps downlink and 11.5 Mbps uplink rates for up to 64 simultaneous users, or WiMAX at 10 MHz. The BSC9132 supports multimode operation that enables it to process LTE-FDD/TDD and HSPA+ users simultaneously.