Samsung Wide IO Memory Interface for the faster and lower power ARM Processors of the future

Posted by Charbax – November 21, 2013

Memory bandwidth is one of the most important features in an SoC to get performance. Here presenting Samsung's new memory architecture, possibly (my guess) to be used in Exynos6 (64bit) possibly at 20nm or perhaps even 14nm even, Samsung talks about their upcoming Wide-IO faster Memory Interface architecture for future ARM Processors to input and output much faster memory bandwidth. To run the same workload, it can use 60-70% less power of the memory plus memory interface power within the SoC, which is a large part of the power consumption within an ARM SoC, Samsung is ready with the technology. The business is about the timing, they are aiming for the best timing to introduce this technology. Provides for example 17gbit/s memory bandwidth, allowing to increase memory bandwidth possibly above 100gbit/s, to be confirmed as better technology is implemented. The history of LP-DDR is to increase the frequency to increase memory bandwidth, but with Samsung's Wide-IO memory design, they can increase the memory lines instead and thus achieve much better memory bandwidth, possibly running 2-3x faster memory bandwidth at the same frequency, perhaps something like 50gbit/s easily. The demand for the memory bandwidth for smartphone devices will surpass memory bandwidth for the traditional desktop PC.