RISC is inherently lower power

Posted by Charbax – May 7, 2011

Category: Opinions

Here is a quote by ARM CMO Ian Drew at mobile-device.biz:

“Intel has always innovated through process improvement,” said Drew, “But it’s not just about the transistor. You have to also consider the architecture, SoC design, the broader ecosystem, and so on.”

So Drew isn’t contesting the significance of Intel’s technological breakthrough. But while a smaller manufacturing process undoubtedly confers power/performance benefits, so does the micro-architecture, the efficiency of the whole SoC, software optimisation, and so on.

We put it to Drew that Intel had said it was a ‘misconception’ that ARM’s architecture was somehow intrinsically more power-efficient than Intel’s. “Fewer transistors means lower power,” he countered. “so RISC is inherently lower power.” Drew also pointed out that ARM has already announced test chips at 22 and 20nm already, with foundry partners TSMC and GlobalFoundries also working on those processes, and that IBM is already working on 14nm.

David Patterson on blogs.arm.com Professor of Computer Science at UC Berkeley since 1977 who coined the term RISC (Reduced Instruction Set Computer):

The importance of maintaining the sequential programming model combined with the increasingly abundant number of transistors from Moore’s Law led, in my view, to wretched excess in computer design. Measured by performance per transistor or by performance per watt, the designs of the late 1990s and early 2000s were some of the least efficient microprocessors ever built. This lavishness was acceptable for PCs, where binary compatibility was paramount and cost and battery life were less important, but performance was delivered more by brute force than by elegance.

However, these excessive designs are not a good match to the smartphones and tablets of the PostPC era. RISC dominates these “Personal Mobile Devices,” because

It’s a new software stack and software distribution is via the “App Store model” or the browser, which lessens the conventional obsession with binary compatibility.

RISC designs are more energy efficient.

RISC designs are smaller and thus cheaper.

The table below from Microprocessor Report supports these last two claims:

Comparing performance per megahertz, x86 is 4% – 8% faster than ARM or MIPS. More significantly, this table suggests ARM and MIPS have 40% – 50% better energy per MHz and their size is a factor of 3X to 4X smaller than x86.

Independent of these architectural battles, Personal Mobile Devices rely on “Systems on a Chip” to reduce size, improve energy, and to lower costs. If processors are available as IP blocks, any company can create a single SOC rather than use many separate chips on a printed circuit board, as is the case with PCs. Thus far, there is no serious x86 IP competitor to the many fine RISC IP options, so SOCs based on x86 can only come from AMD or Intel.