In fact HiSilicon is a subsidiary of Huawei..

yes, of course. but two masters only instead of 3 masters. no coherency to support, no buffering to add to cope with snoop delays (CCI has no directory). And add one top of that two big L2 compared to 1. Which system is smaller , simpler, lower power ? 

 Yeah !, because Tegra fifth core doesn’t need interconnect, ¿ right ?.

 That should have been “precludes the former” or “results in the latter case”.

Does anyone know what the actual capabilities are?

 I already said this isn’t a 64bit chip, it only has a 64bit memory bus!

There’s no such thing as 64 bit arm cpu’s.  It only exist on paper.  Nvidia, TI and Qualcomm all use 32 bit memory bandwidth in their SOC’s.  Though these SOC’s were able to compensate by using dual channel memory soc’s.  We will see if this phone is faster than the others as they claim.

you are right. big.Little is probably the most expensive way of doing things. You need two cluster + coherent interconnet (w/o directory) . This interconnect alone will probably consume more power that a Cortex A9 in LP process

What Karel Gardas said is right. I guess you are the one who get it wrongly.

http://www.arm.com/about/newsroom/hisilicon-licenses-arm-technology-for-use-in-networking-infrastructure-and-mobile-computing-applications.php

Thanks again Charbax.

No, the best innovation of whole ARM industry is big.LITTLE Cortex-A15 / Cortex-A7 architecture.

“Companion” core is like disable 3 cores and underclock the 4th.

No, the best innovation of whole ARM industry is big.LITTLE Cortex-A15 / Cortex-A7 architecture.

“Companion” core is like disable 3 cores and underclock the 4th.

 Intel’s latest 32nm Medfield SoC FAB is, besides some performance tweaks, still based on the same ATOM architecture they’ve been using for years.  So should come at no surprise that ARM’s much more modern next gen offerings will outshine it.  However, they’re completely re-working the ATOM architecture next year with the 22nm Silvermont and finally making the ATOM up to date. 

While Intel is apparently ahead in dealing with the power leakage issue as they continue to shrink the FAB that could start compensating them for their normal power efficiency disadvantage versus ARM.

So it’s hard to say right now how this will play out.  We only know the next gen ARM offerings will likely become the best low cost solutions, barring legacy support, by the end of this year but next year is next year.

Btw, I’ve seen some other sites incorrectly state this K3V2 quad core as being 64bit.  What it actually has is a 64bit memory bus and that’s one of the key reasons it can probably out perform the Tegra 3.

I agree, the HiSilicon claim that the “companion core” is not needed is dubious and it remains to be seen how power efficient their solution is for a proper comparison.