Category: FPGA

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Microchip Microsemi PolarFire Low Power FPGA Series from 100K to 500K Logic Elements

Posted by Charbax – May 6, 2019

Microchip PolarFire FPGAs deliver the industry’s lowest power at mid-range densities with security and reliability. The product family spans from 100K logic elements (LEs) to 500K LEs, features 12.7G transceivers and offers up to 50% lower power than competing mid-range FPGAs. The devices are ideal for a wide range of applications within wireline access networks and cellular infrastructure, defense and commercial aviation markets, as well as industrial automation and IoT market

Microchip Mi-V RISC-V CPU with Microsemi FPGA

Posted by Charbax – March 11, 2019

Microchip acquired Microsemi, and with it comes their new Mi-V RISC-V ecosystem, a suite of tools and design resources developed by Microsemi and third parties to support RISC-V designs using RISC-V Soft IP Cores available for RTG4, IGLOO2 and PolarFire FPGAs, introducing the industry's first RISC-V SoC FPGA Architecture, PolarFire SoC which brings deterministic real-time performance to Linux in a coherent multi-core RISC-V CPU. The RISC-V Mi-V Ecosystem consists of various design tools such as the Libero SoC FPGA Design Suite, Eclipse based IDE SoftConsole enabling quick C and C++ development, a Firmware Catalog consisting of numerous drivers, and third party platforms for development, simulation and debug.

Shiratech shows LTE, NB-IoT, FPGA, Bosch sensors Mezzanine boards for 96Boards

Posted by juliusaugustus – November 21, 2018

Shiratech produces ARM system on modules that cut time to market significantly and reduce project development risk. The Mezzanine board by shiratech is a dev board that provides LTE connectivity and can be connected to an arduino or Raspberry Pi. The SPECIFICATIONS are MAX-10 10M04: 256 FPGA package, 4K Logic Elements, 189Kb Block memory, Up to 156KB user FLASH memory, Dual internal configuration, and 178 GPIO FPGA programming using Altera standard programming connector.

Avnet shows $249 Ultra96 Xilinx Zynq UltraScale+ MPSoC development board

Posted by Charbax – September 8, 2018

From idea to design and from prototype to production, Avnet supports customers at each stage of a product’s lifecycle. A comprehensive portfolio of design and supply chain services makes Avnet the go-to guide for innovators who set the pace for technological change. For nearly a century, Avnet has helped its customers and suppliers around the world realize the transformative possibilities of technology.

Avnet has a very strong, technical community focus and is now home to such entities as Premier Farnell, Element14, MakerSource, hackster.io, and Raspberry Pi.

Avnet is Xilinx’ global distributor and technical partner. Xilinx has awarded Avnet a Premier partnership level in their Alliance Program. In addition to distributing Xilinx devices, Avnet also designs development boards, creates and delivers training, and also customizes and manufacturers Xilinx-based boards for customers around the world.

The Ultra96 is an example of this closer partnership, as Xilinx and Avnet have worked together to bring the board to market. Both companies will continue to support the board into the future.

Tomas Evensen, Xilinx CTO of Embedded Software at Linaro Connect

Posted by Charbax – March 24, 2018

Tomas Evensen talks about FPGA, the Xilinx Ultra96 development board to be available at $249 (also see my video with Xilinx about Ultra96 here) and the announcement by Xilinx of their upcoming 7nm FPGA with ARM cores SoCs to come in 2019 with up to 50 Billion transistors on the SoC.

Xilinx Ultra96, UltraScale+ FPGA 96Boards development board

Posted by Charbax – March 22, 2018

Ultra96 is an Arm-based, Xilinx Zynq UltraScale+ MPSoC development board based on the Linaro 96Boards specification. The 96Boards’ specifications are open and define a standard board layout for development platforms that can be used by software application, hardware device, kernel, and other system software developers. Ultra96 represents a unique position in the 96Boards community with a wide range of potential peripherals and acceleration engines in the programmable logic that is not available from other offerings.

Ultra96 boots from the provided Delkin 16 GB MicroSD card, pre-loaded with PetaLinux. Engineers have options of connecting to Ultra96 through a Webserver using integrated wireless access point capability or to use the provided PetaLinux desktop environment which can be viewed on the integrated Mini DisplayPort video output. Multiple application examples and on-board development options are provided as examples.

Ultra96 provides four user-controllable LEDs. Engineers may also interact with the board through the 96Boards-compatible low-speed and high-speed expansion connectors by adding peripheral accessories such as those included in Seeed Studio’s Grove Starter Kit for 96Boards.

Micron LPDDR4 memory provides 2 GB of RAM in a 512M x 32 configuration. Wireless options include 802.11b/g/n Wi-Fi and Bluetooth 4.2 (provides both Bluetooth Classic and Low Energy (BLE)). UARTs are accessible on a header as well as through the expansion connector. JTAG is available through a header (external USB-JTAG required). I2C is available through the expansion connector.

Ultra96 provides one upstream (device) and two downstream (host) USB 3.0 connections. A USB 2.0 downstream (host) interface is provided on the high speed expansion bus. Two Microchip USB3320 USB 2.0 ULPI Transceivers and one Microchip USB5744 4-Port SS/HS USB Controller Hub are specified.

The integrated power supply generates all on-board voltages from an external 12V supply (available as an accessory).

Xilinx FPGA Keynote at Linaro Connect Hong Kong 2018

Posted by Charbax – March 21, 2018

HKG18-300K2 – Keynote: Tomas Evensen – All Programmable SoCs? – Platforms to enable the future of Embedded Machine Learning

As Moore’s law is slowing down, heterogeneous architectures are needed to keep up with the increasing compute requirements emerging from industry trends such as the use machine learning across a diverse range of markets and applications. These compute requirements require custom system architectures to suit the rapidly evolving demands of emerging algorithms, standards and trends.
Field Programmable hardware offers a unique capability to provide flexibility alongside advanced processor architectures to address this ever increasing multitude of applications. Development flows, programmability and flexibility are crucial to the enablement of these advancing algorithms and to enable the next generation of implementations in a world of advancing Artificial intelligence.
In this session we will introduce you to an all Programmable paradigm and low cost development platform to enable an ecosystem of flexibility and unparalleled programmability.
The future is now……

http://connect.linaro.org/resource/hkg18/hkg18-300k2/

Learn More at http://connect.linaro.org

OpenGPU on Altera Cyclone V FPGA at Linaro Connect 2017

Posted by Charbax – September 27, 2017

Fabrício Ribeiro Toloczko, ​Systems engineer of The Technological Integrated Systems Laboratory (LSI-tec) and CITI-USP (Interdisciplinary Center in Interactive Technologies from University of São Paulo) presents the OpenGPU, a real GPU implementation that proposes a methodology to progressively develop hardware from a software implementation, making the process for producing hardware more easy and fast. Today, it runs on an Altera Cyclone V SoC FPGA with a dual-core ARM Cortex-A9. This processor is used to keep running a Linux distribution, while sending and receiving data through the memory mapped communication with the FPGA. Mesa3D and Gallium's softpipe driver are used for creating most of the graphic pipeline. The FPGA holds one rasterizer, which is a fixed function in graphic pipeline. With that, it's possible to run any OpenGL application, doing the hardware and software changes in real time.

Altera Arria 10 FPGA with dual-core ARM Cortex-A9 on 20nm

Posted by Charbax – May 21, 2015

Altera is shipping their second generation ARM Cortex-A9 based FPGA in the Altera Arria 10 FPGA, built on 20nm, running at 1.5 GHz, the ARM processor provides a 50% increase in performance over the previous generation (Altera Arria 5) with also a 30% power reduction. Altera Arria 10 SoCs support secure boot with authentication based on Elliptical Curve Digital Signature Authentication (EC DSA), with a layered public key infrastructure for root of trust support, Advanced Encryption Standard (AES) and new anti-tamper features. Altera Arria 10 HPS now has three Ethernet MAC cores, 256 KB Scratch-RAM, supports 8- and 16-bit NAND flash devices, eMMC SD/SDIO/MMC cards, and 72-bit DDR3/4 memory. Altera Arria 10 features the industry’s only midrange 28.3 Gbps support, highest performance 2,666 Mbps DDR4 SDRAM memory interface, IEEE 754-compliant hard floating-point with 1,500 GFLOPS of DSP performance and 96 transceiver lanes deliver 3.6 Tbps of serial bandwidth.

Xilinx Zynq UltraScale+ FPGA MPSoC with quad ARM Cortex-A53 and dual ARM Cortex-R5

Posted by Charbax – March 16, 2015

Xilinx announces their next generation 16nm FPGA with quad-core ARM Cortex-A53 and dual-core ARM Cortex-R5, Mali400 GPU. The FPGA market is for designs where flexibility, high performance and fast time to market is important providing programmable hardware. The silicon is going to be available at the end of this year, so they are for now showing emulated version of their SoC. The dual-core ARM Cortex-R5 on the SoC are used for increased safety and security. By going with a 16nm 64bit design, Xilinx can pack a lot more performance without consuming more power than their previous dual-core ARM Cortex-A9 based Zynq 7000 which I filmed here http://armdevices.net/2011/03/04/xilinx-zynq-7000-series-cortex-a9-in-fpga-at-embedded-world-2011/

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